FIGS. 16(a) and 16(b) are a plan view and a sectional view illustrating a conventional dielectric package for mounting high frequency IC chips. In the figures, reference numeral 1 designates a package body comprising a dielectric material, such as alumina or glass. The size of the package body 1 is 17 mm.times.10 mm. Reference numeral 2 designates a space for mounting IC chips (hereinafter referred to as a cavity) having a depth equivalent to the thickness of the IC chip to be mounted. The cavity 2 is electrically connected to a grounding layer 11 on the rear surface of the package body 1 via through-holes 3. The grounding layer 11 is formed by Au plating or the like. A cavity wall 7 surrounds the cavity 2. High frequency signal transmission lines 4, i.e., microstrip lines, are disposed on the package body 1 extending from opposite ends of the package body 1 under the cavity wall 7 until they reach the cavity 2. Reference numeral 12 designates DC bias lines.
FIGS. 17(a) and 17(b) are a plan view and a sectional view illustrating a dielectric package on which high frequency IC chips are mounted. In the figures, two high frequency IC chips 8 are mounted on the cavity 2 of the dielectric package body 1 using solder or conductive adhesive. Then, as shown in FIG. 18, electrodes (not shown) of the IC chips 8 are connected to each other and to the high frequency transmission lines 4 and the DC bias lines 12 on the package body 1 by wires or ribbons using a wedge-shaped blade 10 and, thereafter, a lid 6 comprising the same material as the package body 1 is put on the cavity wall 7 to hermetically shield the IC chips 8.
In the conventional high frequency IC package, the cavity 2 is formed in the package body 1 and the IC chips 8 are disposed on the surface of the cavity 2, whereby the wires for connecting the transmission lines 4 on the package body and the IC chips 8 are shortened. Generally, in a high frequency band, particularly in the millimeter frequency band above 30 GHz, the reflection loss due to impedance mismatching and conductor loss due to the length of the transmission line are significant. Therefore, it is necessary to dispose the cavity wall 7' close to the cavity 2 as shown in FIG. 19 to shorten the wires 13 and the transmission lines 4. When the IC chips are bonded to the cavity 2 of the conventional package, as shown in FIG. 18, the bonding process is carried out in the vicinity of the cavity wall using a manual bonding tool while irradiating the cavity 2 with light in the direction indicated by the arrow 9 and observing with operator's eyes. If the cavity wall 7' is close to the cavity 2, the wedge-shaped blade 10 at the tip of the wire bonder unfavorably contacts the cavity wall 7'. In order to avoid this contact, the cavity wall 7 must be spaced from the edge of the cavity by more than 7 mm and, therefore, it is difficult to reduce the lengths of the wires and the transmission lines inside the cavity wall.
In addition, such a large space inside the cavity wall increases the radiation loss. Further, since the interval between the chip and the cavity wall in the direction perpendicular to the high frequency signal input-output direction cannot be reduced, a cavity resonance occurs, which adversely affects the high frequency characteristics.